Supermicro H8SCM-F User Manual Page 68

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B-2
H8SCM(-F) Serverboard User’s Manual
B-2 Bootblock Recovery Codes
The bootblock recovery checkpoint codes are listed in order of execution:
Checkpoint Code Description
E0h The onboard oppy controller if available is initialized. Next, beginning the base 512 KB
memory test.
E1h Initializing the interrupt vector table next.
E2h Initializing the DMA and Interrupt controllers next.
E6h Enabling the oppy drive controller and Timer IRQs. Enabling internal cache memory.
Edh Initializing the oppy drive.
Eeh Looking for a oppy diskette in drive A:. Reading the rst sector of the diskette.
Efh A read error occurred while reading the oppy drive in drive A:.
F0h Next, searching for the AMIBOOT.ROM le in the root directory.
F1h The AMIBOOT.ROM le is not in the root directory.
F2h Next, reading and analyzing the oppy diskette FAT to nd the clusters occupied by the
AMIBOOT.ROM le.
F3h Next, reading the AMIBOOT.ROM le, cluster by cluster.
F4h The AMIBOOT.ROM le is not the correct size.
F5h Next, disabling internal cache memory.
FBh Next, detecting the type of ash ROM.
FCh Next, erasing the ash ROM.
FDh Next, programming the ash ROM.
FFh Flash ROM programming was successful. Next, restarting the system BIOS.
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