Supermicro X10SDV-TLN4F User Manual Page 52

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2-30
X10SDV-TLN4F/F Motherboard User’s Manual
LAN3/4
LAN1/2
PCI-E3.0 X16
:TPM/PORT80
USB 2/3
USB 0/1(3.0)
USB 4/5
SLOT7
JBT1
IPMI_LAN
JGPIO1
DESIGNED IN USA
1
X10SDV-TLN4F
REV:1.01
LED3
J6
BMC
AST2400
i350
CPU
JUIDB1
I-SGPIO2
I-SGPIO1
JF1
JL1
JOH1
JD1
PJ1
JSTBY1
JPW1
LED8
LED7
LEDM1
BT1
FAN3
FAN2
FAN1
COM1
VGA1
JTPM1
JSD1
JPUSB1
JPME1
JPG1
JPB1
JI2C1
JI2C2
JSMB1
JPL1
JBR1
JPME2
I-SATA3
I-SATA1
I-SATA2
I-SATA5
I-SATA4
DIMMB2
DIMMA2
DIMMB1
DIMMA1
I-SATA0
JIPMB1
JNVI2C1
SRW2
SRW1
JWD1 JPTG1
J21
BIOS Recovery
Close pins 2 and 3 of jumper JBR1 for
BIOS recovery. The default setting is on
pins 1 and 2 for normal operation. See
the table on the right for jumper settings.
BIOS Recovery
Jumper Settings
Pin# Denition
1-2 Normal
2-3 BIOS Recovery
A
B
A. BIOS Recovery
B. PCH SMBus Header
System Management Bus Header
A PCH System Management Bus
header for additional slave devices or
sensors is located at JSMB1. See the
table on the right for pin denitions.
SMBus Header
Pin# Denition
1 Data
2 Ground
3 Clock
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