Chapter 2: Installation
2-31
B
C
CLEAR CMOS SWITCH
A-SATA 0I-SATA 0
I-SATA 1
I-SATA 2
PCIE3
PCIE5
PCIE1
JPUSB2
1
3
JPUSB1
13
JLED1
JVR2
1
3
JPL1
1
JBR1
1
JPME2
1
JPL2
1
JPAC1
1
JPME1
1
3
JWD1
1
3
JVR1
1
3
JBT1
JSTBY1
1
3
JSD1
+
1
5
19
10
11
11
10
19
1
13
JPCIE2 JPCIE6
JPCIE4
JF1
1
DESIGNED IN USA
X10SAT
BIOS LICENSE
FOR HOME OR OFFICE USE
With FCC Standards
Tested to Comply
19
20
JTPM1
1
2
JPW2
1
1
7
10
10
7
2
1
1
JPEX_DEBUG
JL1
1
JSPDIF_OUT
1
JI2C1
1
JI2C2
1
24
13
JPW1
1
59
1
JITP1
2
LED1
R298
R97
SP1
1
FAN3
4
4
1
FAN2
FAN5
1
4
1
FAN1
4
FAN4
1
1
JD1
4
THUNDERBOLT
USB 6/7(3.0)
USB 16/17
USB 4/5(3.0)
USB 14/15
USB 2/3(3.0)
USB 0/1(3.0)
CPU
CPU_SLOT2 PCI-E 3.0 X4 (IN X16)
PCH_SLOT1 PCI-E 2.0 X1 (INX4)
PCH_SLOT5 PCI-E 2.0 X1 (INX4)
PCH_SLOT3 PCI-E 2.0 X1 (INX4)
USB12/13
LAN2
LAN1
HDMI
JWD1:
JBR1:
2-3:BIOS RECOVERY
1-2:NORMAL
JPME1:
2-3:ME RECOVERY
1-2:NORMAL
ENABLE
LAN2
DISABLE
2-3
1-2
JPL2
LAN1
DISABLE
ENABLE
2-3
1-2
JPL1
JWOR1:
2-3:NMI
1-2:RST
WATCH DOG
2-3:ME MANUFACTURING MODE
USB 0/1
1-2:NORMAL
JPME2:
JTPM1:TPM/PORT80
JLED1:
3 PIN POWER LED
AUDIO FP
HDDPWR
LEDLED
P1-DIMMB1
P1-DIMMB2
NIC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
NIC2
HD AUDIO
WAKE ON RING
USB4/5
USB6/7
OH/FF
LED
X
P1-DIMMA1
P1-DIMMA2
RST
PWR
JF1
ON
ALWAYS POPULATE BLUE SOCKET FIRST
UNB NON-ECC DDR3 DIMM REQUIRED
CPU_SLOT4 PCI-E 3.0 X8 (IN X16)
CPU_SLOT6 PCI-E 3.0 X16
COM1
VGA/DVI
2-3:DISABLE
1-2:ENABLE
JPAC1:AUDIO
POWER BUTTON
USB 2/3
A-SATA 1I-SATA 3
I-SATA 4
I-SATA 5
BATTERY
2
1
J_1394
1
1
A. AUDIO FP
B. T-SGPIO 1
C. T-SGPIO 2
A
Front Panel Audio Header (AUDIO FP)
A 10-pin Audio header is supported on the
motherboard. This header allows you to
connect the motherboard to a front panel
audio control panet, if needed. Connect an
audio cable to the audio header to use this
feature (not supplied). See the table at right
for pin denitions for the header.
10-in Audio
Pin Denitions
Pin# Signal
1 Microphone_Left
2 Audio_Ground
3 Microphone_Right
4 Audio_Detect
5 Line_2_Right
6 Ground
7 Jack_Detect
8 Key
9 Line_2_Left
10 Ground
T-SGPIO 1/2 Headers
Two SGPIO (Serial-Link General Pur-
pose Input/Output) headers (TSGPIO-1/T-
SGPIO-2) are located on the motherboard.
These headers support serial link interfaces
for the onboard SATA and SAS connectors.
See the table on the right for pin deni-
tions. Refer to the board layout below for
the location.
T-SGPIO
Pin Denitions
Pin# Denition Pin Denition
1 NC 2 NC
3 Ground 4 Data
5 Load 6 Ground
7 Clock 8 NC
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