Supermicro X10SAT User Manual download pdf (Page 50)

2-30

X10SAT User’s Manual

CLEAR CMOS SWITCH

A-SATA 0I-SATA 0

I-SATA 1

I-SATA 2

PCIE3

PCIE5

PCIE1

JPUSB2

1

3

JPUSB1

13

JLED1

JVR2

1

3

JPL1

1

JBR1

1

JPME2

1

JPL2

1

JPAC1

1

JPME1

1

3

JWD1

1

3

JVR1

1

3

JBT1

JSTBY1

1

3

JSD1

+

1

5

19

10

11

11

10

19

1

13

JPCIE2 JPCIE6

JPCIE4

JF1

1

DESIGNED IN USA

X10SAT

BIOS LICENSE

FOR HOME OR OFFICE USE

With FCC Standards

Tested to Comply

19

20

JTPM1

1

2

JPW2

1

1

7

10

10

7

2

1

1

JPEX_DEBUG

JL1

1

JSPDIF_OUT

1

JI2C1

1

JI2C2

1

24

13

JPW1

1

59

1

JITP1

2

LED1

R298

R97

SP1

1

FAN3

4

4

1

FAN2

FAN5

1

4

1

FAN1

4

FAN4

1

1

JD1

4

THUNDERBOLT

USB 6/7(3.0)

USB 16/17

USB 4/5(3.0)

USB 14/15

USB 2/3(3.0)

USB 0/1(3.0)

CPU

CPU_SLOT2 PCI-E 3.0 X4 (IN X16)

PCH_SLOT1 PCI-E 2.0 X1 (INX4)

PCH_SLOT5 PCI-E 2.0 X1 (INX4)

PCH_SLOT3 PCI-E 2.0 X1 (INX4)

USB12/13

LAN2

LAN1

HDMI

JWD1:

JBR1:

2-3:BIOS RECOVERY

1-2:NORMAL

JPME1:

2-3:ME RECOVERY

1-2:NORMAL

ENABLE

LAN2

DISABLE

2-3

1-2

JPL2

LAN1

DISABLE

ENABLE

2-3

1-2

JPL1

JWOR1:

2-3:NMI

1-2:RST

WATCH DOG

2-3:ME MANUFACTURING MODE

USB 0/1

1-2:NORMAL

JPME2:

JTPM1:TPM/PORT80

JLED1:

3 PIN POWER LED

AUDIO FP

HDDPWR

LEDLED

P1-DIMMB1

P1-DIMMB2

NIC1

SPEAKER:1-4

JD1:

BUZZER:3-4

JI2C1/JI2C2

ON:ENABLE

OFF:DISABLE

NIC2

HD AUDIO

WAKE ON RING

USB4/5

USB6/7

OH/FF

LED

X

P1-DIMMA1

P1-DIMMA2

RST

PWR

JF1

ON

ALWAYS POPULATE BLUE SOCKET FIRST

UNB NON-ECC DDR3 DIMM REQUIRED

CPU_SLOT4 PCI-E 3.0 X8 (IN X16)

CPU_SLOT6 PCI-E 3.0 X16

COM1

VGA/DVI

2-3:DISABLE

1-2:ENABLE

JPAC1:AUDIO

POWER BUTTON

USB 2/3

A-SATA 1I-SATA 3

I-SATA 4

I-SATA 5

BATTERY

2

1

J_1394

1

1

T-SGPIO2

T-SGPIO1

CPU

B

A. TPM/Port 80

B. J_1394

A

TPM Header/Port 80 Header

A Trusted Platform Module/Port 80

header is located at JTPM1 to provide

TPM support and Port 80 connection.

Use this header to enhance system

performance and data security. See

the table on the right for pin deni-

tions.

TPM/Port 80 Header

Pin Denitions

Pin # Denition Pin # Denition

1 LCLK 2 GND

3 LFRAME# 4 <(KEY)>

5 LRESET# 6 +5V (X)

7 LAD 3 8 LAD 2

9 +3.3V 10 LAD1

11 LAD0 12 GND

13 SMB_CLK4 14 SMB_DAT4

15 +3V_DUAL 16 SERIRQ

17 GND 18 CLKRUN# (X)

19 LPCPD# 20 LDRQ# (X)

IEEE 1394 Header

The IEEE 1394 header, also known

as FireWire®, is type of digital data

interface that connects with external

devices and peripherals. See the

tables on the right for pin denitions.

A separate cable (not provided) is

needed for this header.

1394 Pin Denitions

Pin# Denition Pin# Denition

1 PTPA0+ 2 PTPA0-

3 GND 4 GND

5 PTPB0+ 6 PTPB0-

7 PWR 1394a 8 PWR 1394a

10 Shield GND

1 2 ... 45 46 47 48 49 50 51 52 53 54 55 ... 112 113

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