Supermicro X10DRL-i User Manual download pdf (Page 43)

Chapter 2: Installation

2-21

Power Button

OH/Fan Fail/

PWR Fail LED)

1

NIC1 Link LED

Reset Button

2

Power Fail LED

HDD LED

FP PWRLED

Reset

PWR

3.3 V

UID Switch

UID LED

Ground

Ground

1920

3.3V

X

Ground

NMI

X

NIC2 Link LED

NIC2 Activity LED

NIC1 Activity LED

Power LED

The Power LED connection is located

on pins 15 and 16 of JF1. Refer to the

table on the right for pin denitions.

NMI Button

The non-maskable interrupt button

header is located on pins 19 and 20

of JF1. Refer to the table on the right

for pin denitions.

NMI Button

Pin Denitions (JF1)

Pin# Denition

19 Control

20 Ground

Power LED

Pin Denitions (JF1)

Pin# Denition

15 3.3V

16 PWR LED

Front Control Panel Pin Denitions

A. NMI

B. PWR LED

A

B

LE6

JBT1

BIOS

LICENSE

JPI2C1

J24

JPWR2

JF1

JD1

JL1

JSD1

BT1

JTPM1

JPL1

JPL2

JPG1

JPB1

JWD1

JI2C2

JPME2

JI2C1

JPF1

JPF2

J23

SP1

JUIDB1

LE2

LE1

LEDM1

FANB

FAN4

FAN3

FAN1

FAN5

FAN6

FANA

MAC CODE

BAR CODE

(3.0)

USB12/13

USB2/3

USB4

USB0/1

JSTBY1

JIPMB1

S-SATA2

S-SATA0

COM2

S-SATA1

S-SATA3

I-SATA5

PCH SLOT1 PCI-E 2.0

X4(IN X8)

I-SATA4

CPU1 SLOT2 PCI-E 3.0 X8

I-SATA3

I-SATA2

I-SATA1

CPU1 SLOT3 PCI-E 3.0 X8

I-SATA0

CPU2 SLOT4 PCI-E 3.0 X4 (IN X8)

CPU1 SLOT5 PCI-E 3.0 X16

CPU1 SLOT6 PCI-E 3.0 X8

UID

P2-DIMME1

P1-DIMMC1

P2-DIMMF1

P1-DIMMD1

P2-DIMMH1

P1-DIMMB1

VGA

P1-DIMMA1

CPU1

LAN2

P2-DIMMG1

CPU2

LAN1

IPMI_LAN

COM1

JPWR1

BMC

PCH

LAN CTRL

LAN CTRL

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

USB8/9(3.0)

BIOS

I-SGPIO1

S-SGPIO

1

J10

FAN2

X10DRL-i

Rev. 1.01

I-SGPIO2

IPMI CODE

1 2 ... 38 39 40 41 42 43 44 45 46 47 48 ... 120 121

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