Supermicro X7QC3 User Manual Page 15
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Chapter 1: Introduction
1-9
1-2 Chipset Overview
Built upon the functionality and the capability of the Intel 7300 chipset, the X7QC3/
X7QCE motherboard provides the performance and feature set required for Quad
processor-based systems with confi guration options optimized for communica-
tions, storage, computation or database applications. The 7300 chipset supports
Quad Intel
®
Xeon 7300/7200 Quad-Core/Dual-Core processors with front side bus
speeds of up to 1.066GHz. The chipset consists of the 7300 Memory Controller
Hub (MCH), and the Enterprise South Bridge 2 (ESB2).
The 7300 MCH chipset is designed for symmetric multiprocessing across four
independent front side bus interfaces. Each front side bus uses a 64-bit wide,
1066MHz data bus that transfers data at 8.5 GB/s for a total bandwidth of 34 GB/s.
The MCH chipset connects up to 32 Fully Buffered DIMM 2 modules, providing
a total memory bandwidth of up to 25.5 GB/s (for 533) and 32 GB/s (for 667),
capable of addressing up to 512 GB of memory. The MCH chipset also provides
seven x4 PCI-Express and one x4 ESI interface (ESI) to the ESB2. In addition, the
7300 chipset offers a wide range of Reliability, Availability & Serviceability (RAS)
features, including memory interface ECC, x4/x8 Single Device Data Correction,
CRC, parity protection, memory mirroring, memory sparing and Hot-Plug support
on the PCI-E. (Note: If the processor used also supports these features.)
Designed to be used with conjunction of the 7300 chipset, the Xeon 7300/7200
Quad-Core/Dual-Core Processor provides a feature set as follows:
The Xeon 7300/7200 Quad-Core/Dual-Core Processors
L1 Cache Size: Instruction Cache (32KB), Data Cache (32KB)•
L2 Cache Size: 4MB/8MB (4MB shared between two cores for a total of •
8MB per processor)
Data Bus Transfer Rate: 8.5 GB/s•
Multi-Processor Support: 1 Processor per FSB•
Package: 604-pin mPGA•
7300 MCH Features
Quad independent processor buses (1 processor per bus)•
Each bus supports up to 4 physical processor cores•
40-bit address ability support•
Double-pumped address buses with a peak address bandwidth of 533 million •
addresses/second
Parity protection on address and data signals•
Intel ESB2 Features
Dual Interface to Memory Controller•
Supports PCI-Express Rev. 1.0a, PCI/PCI-X Rev. 2.3•
Hot-Plug Controller•
ACPI Power Management Logic Support•
- SUPER 1
- Preface 3
- Table of Contents 4
- Chapter 3: Troubleshooting 6
- Chapter 4: BIOS 6
- Appendices: 6
- Chapter 1 7
- Introduction 7
- Contacting Supermicro 8
- Quick Reference X7QC3/X7QCE 11
- Motherboard Features 12
- 14
- 1-2 Chipset Overview 15
- 1-3 Special Features 16
- 1-4 PC Health Monitoring 16
- 1-5 ACPI Features 17
- 1-7 Super I/O 18
- 1-6 Power Supply 18
- Chapter 1: Introduction 19
- Chapter 2 21
- Installation 21
- Installation Procedures 22
- Warning! Make 23
- To Uninstall the Heatsink 24
- Memory Support 25
- Back Panel Connectors 27
- B. Front Control Panel 28
- Power LED 29
- NMI Button 29
- NIC1/NIC2 LED Indicators 30
- Overheat/Fan Fail LED (OH) 31
- Power Fail LED 31
- Power Button 32
- Reset Button 32
- 2-5 Connecting Cables 33
- Universal Serial Bus (USB) 34
- Chassis Intrusion 34
- Fan Headers 35
- . The default setting is 35
- ATX PS/2 Keyboard and 36
- PS/2 Mouse Ports 36
- Serial Ports 36
- Wake-On-Ring 37
- Wake-On-LAN 37
- Power LED/Speaker 38
- GLAN 1/2 (Gigabit Ethernet 38
- VGA Connector 39
- SGPIO Header 39
- Power SMB (I 40
- C) Connector 40
- Alarm Reset 40
- Overheat LED/Fan Failure 41
- Compact Flash Card PWR 41
- Connector 41
- IPMB Header 42
- CMOS Clear 44
- Watch Dog Enable/Disable 44
- A. VGA Enabled 45
- Onboard SAS Enable/ 46
- MegaRAID Enable 46
- Compact Flash Master/Slave 46
- CPU Power Select 47
- 3rd PWR Supply PWR Fault 47
- 2-7 Onboard Indicators 48
- SAS Activity LED Indicator 49
- LED Color Defi nition 49
- On SAS: Active 49
- Off SAS: Not Active 49
- Floppy Connector 50
- SIMSO Slot 50
- IDE Connectors 51
- Chapter 3 53
- Troubleshooting 53
- Memory Errors 54
- Chapter 4 57
- 4-2 Main Setup 58
- 4-3 Advanced Settings 59
- IDE Confi guration Submenu 60
- Floppy Confi guration 63
- PCI/PnP Confi guration 63
- Super IO Confi guration 64
- Chipset Settings 64
- Event Log Confi guration 68
- APCI Confi guration 68
- AHCI Confi guration 69
- APM Confi guration 69
- Hardware Health Confi guration 71
- SMBIOS Confi guration 73
- Remote Access Confi guration 73
- X7QC3/X7QCE User’s Manual 74
- Terminal Type 74
- VT-UTF8 Comb Key Support 74
- Sredir Memory Display Delay 74
- 4-4 Boot Confi guration 75
- Boot Device Priority 76
- Hard Disk Drive 77
- Removable Drives 77
- CD/DVD Drives 77
- 4-5 Security Settings 78
- 4-6 Exit Options 79
- Discard Changes 80
- Load Optimal Defaults 80
- Load Fail-Safe Defaults 80
- Appendix A 81
- BIOS POST Codes 81
- Important Notes to the User: 83
- Serial ATA (SATA) 83
- The Intel Matrix Storage 84
- Creating a RAID 0 Volume: 86
- Creating a RAID 1 Volume: 87
- Deleting RAID Volume: 90
- Appendix C 93
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