Supermicro X10SLL-SF User Manual Page 42

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2-18
X10SLM-F/X10SLL-F/X10SLL-SF/X10SLL-S User’s Manual
FAN2
JP9
SW1
T-SGPIO1
JSTBY1
JIPMB1
JPW2
JSD1
LED3
LED2
JD1
LED5
LED1
JPI2C1
BT1
JPW1
JTPM1
FANA
FAN3
FAN1
FAN2
FAN4
JPL1
JPL2
JPME2
JWD1
JPG1
JBR1
JPME1
J19
J18
J7
JVR1
JI2C1
JI2C2
JOH1
JP8
JL1
JP2
JP1
JP7
USB 3.0-0
USB 3.0-1
USB 3.0-2/3
VGA
LAN2
LAN1
USB4/5
USB6/7
IPMI_LAN
COM2
COM1
P1-DIMMB1
P1-DIMMB2
P1-DIMMA2
P1-DIMMA1
PCH SLOT4 PCI-E 2.0 X4(IN X8)
CPU SLOT5 PCI-E 3.0 X8
CPU SLOT6 PCI-E 3.0 X8(IN X16)
JF1
I-SATA4
I-SATA3
I-SATA5 I-SATA2
I-SATA1
I-SATA0
USB8/9
JRK1
T-SGPIO2
JPB1
X10SLM-F/X10SLL(-F/SF/S)
Rev. 1.02
BMC FW
FP Control
PCH
BMC
CTRL
CPU
SP1
LED4
IPMI Code
BAR Code
MAC Code
JBT1
BIOS
A. Backpanel USB 6 (2.0) (X10SLM-F/
X10SLL-F only)
B. Backpanel USB 7 (2.0) (X10SLM-F/
X10SLL-F only)
C. Backpanel USB 4 (2.0)
D. Backpanel USB 5 (2.0)
E. Front USB 0 (3.0) (X10SLM-F/
X10SLL-F Only)
F. Front USB 1 (3.0)(X10SLM-F/
X10SLL-F only)
G. Front USB 2/3 (3.0) X10SLM-F
only)
H. USB 8/9 (2.0)
Universal Serial Bus (USB)
Four Universal Serial Bus 2.0 ports (USB 4/5, 6/7) are located on the I/O back panel
of the X10SLM-F and X10SLL-F; while two USB 2.0 ports (USB 4/5) are located on
the X10SLL-S/SF. In addition, three USB 3.0 headers (four USB 3.0 connections: 0,
1, 2/3) are located on the X10SLM-F, two USB 3.0 headers (USB 0, 1) are located
on the X10SLL-F. A USB 2.0 header with two USB 2.0 connections (USB 8/9) are
also located on X10SLM/X10SLL to provide front chassis access using USB cables
(not included). See the tables below for pin denitions.
Back Panel USB (2.0) 4/5, 6/7
Pin Denitions
Pin# Denition Pin# Denition
1 +5V 5 +5V
2 USB_PN4 6 USB_PN5
3 USB_PP4 7 USB_PP5
4 Ground 8 Ground
Front Panel USB (2.0) 8/9
Pin Denitions
Pin # Denition Pin # Denition
1 +5V 2 +5V
3 USB_PN8 4 USB_PN9
5 USB_PP8 6 USB_PP9
7 Ground 8 Ground
9 Key 10 Ground
A
Front Panel USB (3.0) 0/1, 2/3
Pin Denitions
Pin# Pin# Signal Name Description
1 19 VBUS Power
2 18 StdA_SSRX- USB 3.0 Differential Receive Pair
3 17 StdA_SSRX+ USB 3.0 Differential Receive Pair
4 16 Ground Ground of PWR Return
5 15 StdA_SSTX- USB 3.0 Differential Transmit Pair
6 14 StdA_SSTX+ USB 3.0 Differential Transmit Pair
7 13 Ground Ground for Signal Return
8 12 D- USB 2.0 Transmit/Receive
Differential Pair
9 11 D+ USB 2.0 Transmit/Receive
Differential Pair
10 x
C
E
B
F
D
H
G
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