Supermicro HMT325R7BFR8C-H9 Specifications Page 13

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Rev. 1.6 / Dec. 2010 13
Figure 1 - Measurement Setup and Test Load for IDD and IDDQ (optional) Measurements
[Note: DIMM level Output test load condition may be different from above]
Figure 2 - Correlation from simulated Channel IO Power to actual Channel IO Power supported
by IDDQ Measurement
VDD
DDR3
SDRAM
VDDQ
RESET
CK/CK
DQS, DQS
CS
RAS, CAS, WE
A, BA
ODT
ZQ
VSS VSSQ
DQ, DM,
TDQS, TDQS
CKE
RTT = 25 Ohm
VDDQ/2
IDD
IDDQ (optional)
Application specific
memory channel
environment
Channel
IO Power
Simulation
IDDQ
Simulation
IDDQ
Simulation
Channel IO Power
Number
IDDQ
Test Load
Correction
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