Supermicro X7SPA-HF User Manual Page 24
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- TROUBLESHOOTING
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Chapter 1: Introduction
1-15
1-6 Super I/O
The Super I/O provides two high-speed, 16550 compatible serial communication
ports (UARTs). Each UART includes a 16-byte send/receive FIFO, a programmable
baud rate generator, complete modem control capability and a processor interrupt
system. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps as
well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which sup-
port higher speed modems.
The Super I/O provides functions that comply with ACPI (Advanced Conguration
and Power Interface), which includes support of legacy and ACPI power manage-
ment through a SMI or SCI function pin. It also features auto power management
to reduce power consumption.
1-7 Overview of the Nuvoton BMC Controller (X7SPA-HF
only)
The Nuvoton
SM
Baseboard Management Controller (BMC), supports the 2D/VGA-
compatible Graphics Core with the PCI interface, Virtual Media, and Keyboard/
Video/Mouse (KVM) Redirection modules.
The Nuvoton BMC interfaces with the host system via a PCI interface to commu-
nicate with the graphics core. It supports USB 2.0 and 1.1 for remote keyboard/
mouse/virtual media emulation. It also provides LPC interface to control Super I/O
functions and is connected to the network via an external Ethernet PHY module. It
also communicates with onboard components via six SMBus interfaces, fan control,
Platform Environment Control Interface (PECI) buses, and General Purpose I/O
(T-SGPIO) ports.
The Nuvoton BMC includes the following features:
One X-Bus parallel interface for expansion I/O connections•
Three ADC inputs, Analog and Digital Video outputs•
Two serial for boundary scan and debug•
The Nuvoton WPCM450 (Manufacturer P/N WPCM450RA0BX) has all the features
as described above plus IPMI 2.0 support. This particular chip is installed in the
X7SPA-HF motherboard model.
Note: For the X7SPA-HF, IPMI is supported (shared) using LAN1. For
more information on IPMI conguration, please refer to the Embedded
IPMI User's Guide posted on our website at http://www.supermicro.com/
support/manuals/. You may also nd information about IPMI by visiting
Intel's website at http://www.intel.com/design/servers/ipmi/
- X7SPA-L 1
- X7SPA-HF 1
- About This Manual 3
- About This Motherboard 3
- Manual Organization 3
- Contacting Supermicro 5
- Table of Contents 6
- Chapter 3 Troubleshooting 8
- Chapter 4 BIOS 8
- Chapter 1 10
- Introduction 10
- X7SPA-L Image 11
- X7SPA-H Image 12
- X7SPA-HF Image 13
- Motherboard Layout 14
- User’s Manual 15
- Motherboard Features 18
- X7SPA Series 20
- BLOCK DIAGRAM 20
- 1-2 Chipset Overview 21
- 1-3 PC Health Monitoring 22
- 1-5 Power Supply 23
- 1-6 Super I/O 24
- 18-bpp Connector 25
- 24-bpp LVDS Panel 25
- Chapter 2 26
- Installation 26
- 2-2 Motherboard Installation 27
- Installation Instructions 28
- 2-3 System Memory 29
- Insert this end rst 30
- 2-4 Connectors/I/O Ports 31
- Back Panel Connectors 32
- Front Control Panel 37
- 2-5 Connecting Cables 41
- Inverter Power Connector 46
- 2-6 Jumper Settings 47
- Metal contact pads 49
- Motherboard 49
- USB Wake-Up 50
- Jumper Settings 50
- Pins 1-2 Enabled 50
- Pins 2-3 Disabled (Default) 50
- Activity LED 55
- Link/Speed LED 55
- Chapter 3 58
- Troubleshooting 58
- Memory Errors 59
- User's Manual 61
- Chapter 4 64
- 4-2 Main Setup 65
- BOOT Feature 67
- CPUConguration 69
- Advanced Chipset Control 70
- NorthbridgeConguration 70
- IDE/SATAConguration 71
- PCI/PnPConguration 74
- SuperIODeviceConguration 75
- RemoteAccessConguration 75
- Hardware Health Conguration 77
- ACPIConguration 79
- EventLogConguration 82
- 4-4 Security Settings 83
- 4-5 Boot Settings 85
- 4-6 Exit Options 86
- Appendix A 88
- POST Error Beep Codes 88
- Appendix B 90
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